Generating Logic Circuit Classifiers from Dendritic Neural Model via Multi-objective Optimization

Abstract

Inspired by biological neurons, a novel dendritic neural model (DNM) was proposed in our previous research to pursue a classification technique with simpler architecture, fewer parameters, and higher computation speed. The trained DNM can be transitioned to logic circuit classifiers (LCCs) by discarding unnecessary synapses and dendrites. Unlike conventional artificial neural networks with floating-point calculations, the LCC operates entirely in binary so it can be easily implemented in hardware, which has significant advantages in dealing with a high velocity of data due to its high computational speed. However, oversimplifying the model architecture will lead to the performance degeneration of LCC, and how to balance the architecture and performance is not well understood in practical applications. Therefore, the primary motivation of this study is twofold. First, a theoretical analysis is presented that the transition of LCCs from DNM can be regarded as a specific regularization problem. Second, a multiobjective optimization framework that can simultaneously optimize the classification performance and model the complexity of LCC is proposed to solve the problem. Comprehensive experiments have been conducted to validate the effectiveness and superiority of the proposed framework.